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PD - 96112A
IRF7413QPbF
l l l l l l l
HEXFET(R) Power MOSFET
A A D D D D
Advanced Process Technology Ultra Low On-Resistance N Channel MOSFET Surface Mount Available in Tape & Reel 150C Operating Temperature Lead-Free
S S S G
1 2 3 4
8 7
VDSS = 30V RDS(on) = 0.011
6 5
Top View
Description
These HEXFET(R) Power MOSFET's in SO-8 package utilize the lastest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of these HEXFET Power MOSFET's are a 150C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These benefits combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. The efficient SO-8 package provides enhanced thermal characteristics making it ideal in a variety of power applications. This surface mount SO-8 can dramatically reduce board space and is also available in Tape & Reel.
SO-8
Absolute Maximum Ratings
Symbol
VDS VGS ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C EAS dv/dt TJ, TSTG
Parameter
Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Single Pulse Avalanche Energency Peak Diode Recovery dv/dt
Max
30 20 13 9.2 58 2.5 0.02 260 5.0 -55 to +150
Units
V A W mW/C mJ V/ns C
c
e
d
Junction and Storage Temperature Range
Thermal Resistance Ratings
Symbol
RJL RJA Junction-to-Drain Lead Junction-to-Ambient
h gh
Parameter
Typ
--- ---
Max
20 50
Units
C/W
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08/09/10
IRF7413QPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Symbol
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd RG td(on) tr td(off) tf Ciss Coss Crss
Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min
30 --- --- --- 1.0 10 --- --- --- --- --- --- --- 1.2 --- --- --- --- --- --- ---
Typ
--- 0.034 --- --- --- --- --- --- --- --- 52 6.1 16 --- 8.6 50 52 46 1800 680 240
Max
--- --- 0.011 0.018 3.0 --- 12 25 -100 100 79 9.2 23 3.7 --- --- --- --- --- --- ---
Units
V V/C V S A nA
Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 1mA VGS = 10V, ID = 7.3A VGS = 4.5V, ID = 3.7A VDS = VGS, ID = 250A VDS = 10V, ID = 3.7A VDS = 30V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 125C VGS = -20V VGS = 20V ID = 7.3A VDS = 24V VGS = 10V, See Fig. 6 and 9
f f
nC
f
ns
pF
VDD = 15V ID = 7.3A RG = 6.2 RG = 2.0, See Fig. 10 VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5
f
Source-Drain Ratings and Characteristics
Symbol
IS ISM VSD trr Qrr
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
Min.
--- --- --- --- ---
Typ.
--- --- --- 74 200
Max.
3.1
Units
A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 7.3A, VGS = 0V TJ = 25C, IF = 7.3A di/dt = 100A/s
58 1.0 110 300 V ns nC
e
e
Notes:
Repetitive rating; pulse width limited by Starting TJ = 25C, L =9.8mH
max. junction temperature. ( See fig. 11 )
ISD 7.3A, di/dt 100A/s, VDD V(BR)DSS, Pulse width 300s; duty cycle 2%. Surface mounted on FR-4 board R is measured at TJ approximately 90C
T J 150C
RG = 25, IAS =7.3A. (See Figure 12)
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IRF7413QPbF
100
VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 3.0V TOP
100
I D , Drain-to-Source Current (A)
I D, Drain-to-Source Current (A)
VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 3.0V TOP
10
10
3.0V
3.0V
1 0.1 1
20s PULSE WIDTH TJ = 25C A
10
1 0.1 1
20s PULSE WIDTH TJ = 150C A
10
V DS , Drain-to-Source Voltage (V)
V DS Drain-to-Source Voltage (V) ,
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.0
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = 7.3A
I D , Drain-to-Source Current (A)
1.5
TJ = 150C TJ = 25C
10
1.0
0.5
1 3.0 3.5
V DS = 10V 20s PULSE WIDTH
4.0
4.5
A
0.0 -60 -40 -20 0 20 40 60 80
VGS = 10V
100 120 140 160
A
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRF7413QPbF
3200 2800 2400 2000 1600 1200 800 400 0 1 10 100
Coss
V GS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd Ciss C oss = C ds + C gd
20
I D = 7.3A V DS = 24V V DS = 15V
16
C, Capacitance (pF)
12
8
Crss
4
A
0 0 10 20 30
FOR TEST CIRCUIT SEE FIGURE 9
40 50 60
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
TJ = 150C
10
ID , Drain Current (A)
TJ = 25C
100
100us 10
1ms
1 0.4 1.2 2.0 2.8
VGS = 0V
A
3.6
1 0.1
TC = 25 C TJ = 150 C Single Pulse
1 10
10ms
100
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRF7413QPbF
QG
V DS VGS RG 10V
RD
10V
VG
QGS
QGD
D.U.T.
+
- VDD
Charge
Pulse Width 1 s Duty Factor 0.1 %
Fig 9a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
Fig 10a. Switching Time Test Circuit
VDS
50K 12V .2F .3F
90%
+ V - DS
D.U.T. VGS
3mA
10% VGS
td(on)
IG ID
tr
t d(off)
tf
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
100
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJA )
D = 0.50 0.20 0.10 0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJA + TA 0.1 1 10 100
10
0.1 0.0001
0.001
0.01
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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IRF7413QPbF
EAS , Single Pulse Avalanche Energy (mJ)
600
TOP
500
15V
BOTTOM
ID 3.3A 6.0A 7.3A
VDS
L
DRIVER
400
RG
20V
D.U.T
IAS tp
+ - VDD
300
A
0.01
200
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
100
0
25
50
75
100
125
150
Starting T J, Junction Temperature ( o C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
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IRF7413QPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 13. For N-Channel HEXFETS
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IRF7413QPbF
SO-8 Package Details
Dimensions are shown in milimeters (inches)
D A 5 B
DIM A b INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040
6 E
8
7
6
5 H 0.25 [.010] A
c D E e e1 H
1
2
3
4
.050 BAS IC .025 BAS IC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BAS IC 0.635 BAS IC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X
e
K L y
e1
A
K x 45 C 0.10 [.004] y 8X c
8X b 0.25 [.010]
A1 CAB
8X L 7
NOT ES : 1. DIMENS IONING & T OLERANCING PER AS ME Y14.5M-1994. 2. CONT ROLLING DIMENS ION: MILLIMET ER 3. DIMENS IONS ARE S HOWN IN MILLIMET ERS [INCHES ]. 4. OUT LINE CONFORMS T O JEDEC OUT LINE MS -012AA. 5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS . MOLD PROT RUS IONS NOT T O EXCEED 0.15 [.006]. 6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS . MOLD PROT RUS IONS NOT T O EXCEED 0.25 [.010]. 7 DIMENS ION IS T HE LENGT H OF LEAD FOR S OLDERING T O A S UBS T RAT E. 3X 1.27 [.050] 6.46 [.255]
FOOT PRINT 8X 0.72 [.028]
8X 1.78 [.070]
SO-8 Part Marking
EXAMPLE: T HIS IS AN IRF7101 (MOSFET ) DAT E CODE (YWW) P = DESIGNAT ES LEAD-FREE PRODUCT (OPT IONAL) Y = LAS T DIGIT OF T HE YEAR WW = WEEK A = AS S EMBLY S IT E CODE LOT CODE PART NUMBER
Notes: 1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/
INT ERNAT IONAL RECT IFIER LOGO
XXXX F7101
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IRF7413QPbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 ) 11.7 ( .461 )
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00 (12.992) MAX.
14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 08/2010
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